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Logic gates `X` and `Y` have the truth tables shown below
image
`{:(P,Q,R,P,R),(0,0,0,0,1),(1,0,0,1,0),(0,1,0,,),(1,1,1,,):}`
When the output of `X` is connected to the input of `Y`, the resulting combination is equivalent to a single.
A. `NOT` gate
B. `OR` gate
C. `NOR` gate
D. `NAND` gate

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