Let an alternating voltage, v = v0 sin ωt , be applied to a circuit containing a pure C an da Pure R, joined in series. The same current i will flow in both C and R. However in R it is in phase with the applied a.c voltage, whereas in C, it leads the a.c. voltage in phase by π/2. Thus rms potential drop, across the resistance, is ahead of the rms potential drop across the capacitor by a phase angle of π/2. The phasor diagram is, therefore drawn as shown.
Is the ‘effective resistance’ of the (series CR) circuit.
It is called the impedance of this circuit and is denoted by z.
The phasor diagram shows that in the RC circuit, the voltage lags behind the current by a phase angle
As seen from the phasor diagram, the phase angle, ϕ , is given by
The capacitive effect dominates in this circuit. This means that the current reaches its maximum value
seconds earlier value the voltage in the circuit. There is a time lag of
seconds between the voltage and the current, vis-a-vis reaching their peak values.
