Use app×
Join Bloom Tuition
One on One Online Tuition
JEE MAIN 2026 Crash Course
NEET 2026 Crash Course
CLASS 12 FOUNDATION COURSE
CLASS 10 FOUNDATION COURSE
CLASS 9 FOUNDATION COURSE
CLASS 8 FOUNDATION COURSE
0 votes
94 views
in Physics by (63.8k points)
closed by

With the help of a labelled diagram, explain how an n-p-n transistor can be used as an amplifier in common emitter configuration. Explain how the input and output voltages are out of phase by 180° for a common emitter transistor amplifier.

1 Answer

+1 vote
by (60.5k points)
selected by
 
Best answer

Common emitter Transistor amplifier

Common emitter Transistor amplifier

The circuit diagram for common emitter n-p-n amplifier is as shown in Fig. In this circuit, the emitter lead is common to both the input (emitter-base) and output (collector-emitter) circuit and is grounded. The emitter is forward biased by emitter base battery Veb and collector is reversed biased by collector-emitter battery Vec, so output resistance is more than input resistance i.e. R0 >> Ri.

Let Ie, Ib and Ic be emitter, base and collector current respectively.

So Ie = Ib + Ic ...........(1)

If RL is load resistance, then the potential drop across RL is IcRL

Hence, collector voltage

Vc = Vec - IcRL ............(2)

When a.c. is fed to the input signal let the first half cycle of input voltage is positive. It will make base more positive and hence emitter current will increase and correspondingly collector current also increases. Hence IcRL factor increases from eq. (2) we find that collector voltage will decrease. Thus corresponding to positive half cycle of a.c. input signal, negative output half cycle will be obtained.

During second half cycle of a.c. input, voltage will be negative and it will make base more negative which decreases the emitter current and hence collector current lc also decreases. So IcRL factor also decreases. From eq. (2) we find that collector voltage will decrease. Thus corresponding to negative half cycle of a.c. input signal, positive output half cycle will be obtained.

Thus in common emitter amplifier the output voltage signal are out of phase with each other as shown in Fig. since input resistance is moderately low (1-2 kΩ) and the output resistance is moderately high (≅ 50 kΩ), so the collector current (output current is very large as compared to base current (input current).

1. Ac current gain (ßa.c.)

The ratio of change in collector current to the change in base current at constant collector voltage. Hence, 

ßac\((\frac{\bigtriangleup I_c}{\bigtriangleup I_b})_{Ve}\) ...........(3)

2. d.c. current gain (ßd.c)

The ratio of collector current to the base current at constant collector voltage is called dc current gain. Hence,

ßd.c.\((\frac{I_c}{I_b})_{Ve}\) ...........(4)

ßd.c. is very nearly equal to ßa.c., so we generally denote the current gain in CE mode as ß. Unless otherwise specified ß means ac current gain. The value of ß varies from 20 to 50.

3. Voltage gain (Av)

The ratio of change in output voltage to the change in input voltage is called voltage gain.

i.e. Av\(\frac{\bigtriangleup V_0}{\bigtriangleup V_b} = \frac{\bigtriangleup I_c}{\bigtriangleup I_e} = \frac{R_L}{R_i}\)

or Av = ß. \(\frac{R_L}{R_i}\) ...........(5)

or Av = ß (resistance gain)

Which is higher than that obtained in case of common-base transisor amplifier.

4. Power gain (P)

The ratio of change in output power to the change in input power is called power gain. Hence,

Power gain = voltage gain x current gain

  ß. \((\frac{R_L}{R_i}) \) x ß

So, power gain P = ß2 (Resistance gain)

= very high power gain .............(6)

Welcome to Sarthaks eConnect: A unique platform where students can interact with teachers/experts/students to get solutions to their queries. Students (upto class 10+2) preparing for All Government Exams, CBSE Board Exam, ICSE Board Exam, State Board Exam, JEE (Mains+Advance) and NEET can ask questions from any subject and get quick answers by subject teachers/ experts/mentors/students.

Categories

...