A student has to use an appropriate number of
(i) NAND gates (only) to get the output Y1,
(ii) NOR gates (only) to get the output Y2,
From two given inputs A and B as shown in the diagram.
Identify the'equivalent gate' needed in each case. Show how one can connect an appropriate number of (i) NAND (ii) NOR gates respectively in the two cases to get these'equivalent gates'.